The present invention relates to a driving circuit for the write head of a magnetic disk drive, and more particularly to a write driver utilizing active reflection cancellation to allow the circuit to provide an undistorted write signal with increased peak voltage delivered by the preamplifier compared to resistive impedance matched write circuits.
Rigid magnetic disk drives employ E-block assemblies supporting a plurality of actuator arms each having read and write heads at the distal end thereof and arranged to move with the E-block across the radius of the magnetic recording disk. The writer circuit, or write driver, is included in an integrated circuit chip mounted on the E-block at the proximal end of the actuator arms and is connected to the write heads at the distal end through interconnect cable.
A typical write circuit preamplifier generates a roughly square wave voltage pattern across a write head that results in a roughly square wave write current pattern through the write head. Each pulse is composed of a rise-time portion, an overshoot portion, and a steady-state portion. The overshoot portion is the portion of the pulse where the absolute value of the write current exceeds the absolute value of the steady-state current; for example, where the steady-state current is 40 mA, the overshoot current may reach a peak of about 70 mA. The rise-time is defined as the time that it takes the current to change from 10% to 90% of its steady-state value, as it swings from one direction to the other. Thus, for a writer programmed for 40 mA steady-state write current, the rise-time is defined as the time required for the current in the write head to change from −32 mA to +32 mA, and vice versa.
Historically, there have been many improvements to conventional write circuits to enhance their performance, primarily in the areas of enhancing the switching speed of the circuit to reduce the rise-time portion of the write current waveform, as well as working with the overshoot portion of the waveform to give a fast rise-time while minimizing undershoot and ringing. However, these improved write circuits have been unable to achieve impedance matching to the interconnect. Such impedance matching would require a small resistor in parallel with the write head which would shunt some of the write current away from the write head during operation of the circuit and thereby compromise the performance of the circuit. The lack of impedance matching results in pattern dependent distortion which limits the performance of the write circuit.
U.S. application Ser. No. 09/475,909 filed Dec. 30, 1999 for “Impedance-Matched Write Circuit” by J. Leighton, R. Barnett and T. Ngo, discloses an impedance-matched write circuit that operates on a principle that is somewhat different than that of conventional write circuits, thereby reducing or eliminating pattern dependent distortion. The impedance matching of this circuit improves the write driver's performance, but also results in a decrease in the voltage delivered by the write driver preamplifier caused by the voltage drop across the series impedance matching resistor.
It would be beneficial to provide a write driver that achieves the reduction and/or elimination of pattern dependent distortion that is provided by impedance matching while delivering the full voltage of the preamplifier to the write circuit. Such a write driver configuration is the subject of the present invention.